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Posted in

IT & Systems

Job Code

1651295

Description:


We are seeking a strategic and technically hands-on leader to drive end-to-end Physical Design execution across multiple design centers in APAC.


The ideal candidate will combine deep technical mastery in implementation flows with proven experience managing distributed teams toward predictable execution, industry-leading PPA (Performance, Power, Area), and first-silicon success.


Key Responsibilities:


Leadership & Strategy:


- Define and execute a long-term physical design strategy aligned with business and product goals.


- Build, mentor, and scale a world-class PD organization across APAC sites (Hyderabad, Singapore, etc.


- Champion flow automation, design methodology innovation, and measurable efficiency gains.


- Partner with architecture, RTL, verification, DFT, and technology teams for early convergence.


Execution Excellence:


- Own and drive PPA and schedule predictability for complex SoC and ASIC programs.


- Ensure strong signoff discipline across STA, IR/EM, LVS/DRC, and timing closure.


- Lead floorplanning, synthesis, place-and-route, and physical verification through tape-out.


- Anticipate and resolve design and flow bottlenecks with data-driven decisions.


Technology Engagement:


- Act as the regional technical interface with foundries and EDA partners.


- Stay current with process node advancements and EDA tool trends.


- Evaluate and deploy new physical implementation technologies (e.


, ML-based optimization, advanced hierarchical design, and ECO automation).


Cross-Functional Collaboration:


- Align with architecture and front-end teams for early physical feasibility assessments.


- Partner with program management for risk tracking and milestone predictability.


- Support customer or partner engagements for design reviews, audits, or co-development.


Required Qualifications:


- 15+ years of experience in ASIC/SoC physical design with at least 5+ years in a senior management or director role.


- Proven record of leading multi-site PD teams and successfully delivering tape-outs.


Strong expertise in:


Floorplanning, P&R, CTS, STA, IR/EM analysis, and signoff.


Tool ecosystems: Synopsys Fusion Compiler, Cadence Innovus, PrimeTime, RedHawk.


Flow automation using TCL/Perl/Python scripting.


Solid grasp of design-for-manufacturability (DFM), yield, and physical verification methodologies.


- Demonstrated ability to drive predictable schedules and achieve PPA leadership under tight constraints.


Preferred Attributes:


- Experience building and scaling global teams or offshore design centers.


- Familiarity with machine-learning-driven EDA optimizations.


- Strategic mindset with the ability to balance execution detail with long-term technology vision.


- Collaborative leadership styleable to inspire technical depth and organizational maturity.


- Strong presentation and stakeholder management skills.


Why This Role Matters:


- This is a cornerstone leadership role in shaping the next generation of silicon products and execution excellence for APAC.


- Youll define standards that influence every design in the region and directly impact product competitiveness and time-to-market.


Benefits & Perks:


- At Silicon Labs, youll be part of a highly skilled team where every engineer makes a meaningful impact.


- We promote work-life balance and a welcoming, fun environment.


- Equity Rewards (RSUs).


- Employee Stock Purchase Plan (ESPP).


- Insurance plans with outpatient cover.


- National Pension Scheme (NPS).


- Flexible work policy.


- Childcare support.


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Job Views:  
1
Applications:  0
Recruiter Actions:  0

Posted in

IT & Systems

Job Code

1651295

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