Job Description

Responsible for managing Validation team focused on SoC and/or Subsystem validation. Manages team allocation across programs; taking care of technical and professional growth of the team; driving end2end validation - functional, GLS, emulation etc. Need to have excellent understanding of SoC architecture, IP designs, validation test environment, pre- and postSi validation challenges. Interfaces with architecture, IP, design, DfT and postSi teams for end2end execution

High Velocity Product Group (HPG) organization under Internet of Things Group (IOTG) - HSPE, delivers End2End platform solutions. HPG is world's best engineering team that delivers products with high velocity, powered by technology excellence. HPG is responsible for the design, development, and production of System-on-a-Chip (SoC) products that go into Intel's next generation IOTG, Client, Mobile and Low/High end Server platforms.

We're looking for a highly motivated, Pre-Silicon Verification Engineer/Leads who are responsible to ensure Right First Time Success of our SoC Products before it is being shipped to production.

Your responsibilities will include but not be limited to:

- Architectural Development of Complex Pre-Silicon Verification environments for simulation and Emulation/FPGA platform.

- Rigorously executing Validation Plans to ensure Right First Time Success of our Products.

- Development of IP/Subsystem/SoC Verification and Coverage plans.

- Work directly with hardware architects, logic designers, IP providers, Physical implementers and Platform validators to influence overall SoC and system design.

Preferred Qualifications:

- Experience designing and validating SOC CPUs (Intel IA and ARM Architectures), Cache Coherency, Power management, Security, Clocking, Boot/Reset, Trace & Debug flows, Imaging, Video, Graphics, Media blocks, Fabrics and Memory controllers.

- Knowledge of Industry standard protocols - TSN, PCIE gen 4/5, USB, LPDDR/DDR 4/5, Ethernet, Storage (UFS, eMMC/SD), Offload Accelerators, Functional Safety.

- Experience with System Verilog/OVM/UVM for IP/Subsystem and SOC development environment,

- Experience with Low power/UPF verification techniques.

- Experience with Formal verification techniques.

- Experience with Gate level (GLS) verification techniques.

- Experience with Verification Tools & Methodology improvements.

- Strong background in scripting - PERL, TCL, Python.

- Experience with Emulation/FPGA environment build, Transactor integration and bring up.

- Execution experience on Emulation/FPGA models.

- System (hardware and software ) debug skills

- Understanding of software and/or hardware validation techniques

- Solid understanding of system and processor architecture, and the interaction of computer hardware with software

- Assembly programming skills

Candidate should exhibit -

- Demonstrate excellent Self-motivation, communication, strong problem solving and teamwork skills.

- Set aggressive goals and meet/beat the commitments.

- Flexible enough to work in a dynamic environment and multitask seamlessly.

- Ability to work independently and in a team.



Qualifications

Candidate should possess a Bachelor's or a Master's degree with 7-15 years' experience in VLSI, Electronics, Electrical, Computer Engineering or Computer Science

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